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the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all devices/types available in every country. please check with local nec representative for availability and additional information. ? 2000 mos integrated circuit pd3747 7400 pixels ccd linear image sensor data sheet document no. s14892ej1v0ds00 (1st edition) date published june 2000 ns cp (k) printed in japan the pd3747 is a high-speed and high sensitive ccd (charge coupled device) linear image sensor which changes optical images to electrical signal. the pd3747 is a 2-output type ccd sensor with 2 rows of high-speed charge transfer register, which transfers the photo signal electrons of 7400 pixels separately in odd and even pixels. and it has reset feed-through level clamp circuits and voltage amplifiers. therefore, it is suitable for 600 dpi/a3 high-speed digital copiers, multi-function products and so on . features ? valid photocell : 7400 pixels ? photocell pitch : 4.7 m ? photocell size : 4.7 4.7 m 2 ? resolution : 24 dot/mm (600 dpi) a3 (297 420 mm) size (shorter side) ? data rate : 44 mhz max. (22 mhz/1 output) ? output type : 2 outputs in phase ? high sensitivity : 19.0 v/lx ? s typ. (light source: daylight color fluorescent lamp) ? low image lag : 1 % max. ? power supply : +12 v ? drive clock level : cmos output under 5 v operation ? on-chip circuits : reset feed-through level clamp circuits : voltage amplifiers ordering information part number package pd3747d ccd linear image sensor 22-pin ceramic dip (cerdip) (10.16 mm (400))
data sheet s14892ej1v0ds00 2 pd3747 block diagram ccd analog shift register photocell transfer gate transfer gate ccd analog shift register d33 d134 s2 s1 s7399 s7400 d135 d140 12 13 14 18 20 22 1 11 21 10 9 5 4 tg 1 2 2 1 2l gnd v out 2 (even) v out 1 (odd) gnd 2l cp r 2 v od
data sheet s14892ej1v0ds00 3 pd3747 pin configuration (top view) ccd linear image sensor 22-pin ceramic dip (cerdip) (10.16 mm (400)) ? pd3747d 1 2 3 4 5 6 7 8 9 10 11 nc nc v out 2 gnd nc 2 photocell structure diagram
data sheet s14892ej1v0ds00 4 pd3747 absolute maximum ratings (t a = +25 c) parameter symbol ratings unit output drain voltage v od ? ? ? ? ? ? ? caution exposure to absolute maximum ratings for extended periods may affect device reliability; exceeding the ratings could cause permanent damage. the parameters apply independently. recommended operating conditions (t a = +25 c) parameter symbol min. typ. max. unit output drain voltage v od 11.4 12.0 12.6 v shift register clock high level v ? ? ? ?
data sheet s14892ej1v0ds00 5 pd3747 electrical characteristics t a = +25 ? ? ? ? ? ? ? ? ? ? ? ? note 1 v os 3.7 4.7 5.7 v output fall delay time note 2 t d v out = 500 mv ? ? ? ? ? ? ? ? ? note 1 rftn light shielding ? + + ? ? ? ? ? ? notes 1. refer to timing chart 2, 3 . 2. when the fall time of ? ) is the typ. value (refer to timing chart 2, 3 ). note that v out 1 and v out 2 are the outputs of the two steps of emitter-follower shown in application circuit example .
data sheet s14892ej1v0ds00 6 pd3747 input pin capacitance (t a = +25 c, v od = 12 v) parameter symbol pin name pin no. min. typ. max. unit shift register clock pin capacitance 1 c ? ? ? ? ? ? ? ? ?
data sheet s14892ej1v0ds00 7 pd3747 timing chart 1 note note optical black (96 pixels) valid photocell (7400 pixels) invalid photocell (6 pixels) invalid photocell (6 pixels) note set the r and cp to low level during this period. ?
data sheet s14892ej1v0ds00 8 pd3747 timing chart 2 (bit clamp mode) rftn v os rftn + ? ? ? , t2 ? 05 ? ? ? ? ? ? ? ?
data sheet s14892ej1v0ds00 9 pd3747 timing chart 3 (line clamp mode) rftn v os rftn + ? ? ? , t2 ? 05 ? ? ? ?
data sheet s14892ej1v0ds00 10 pd3747 timing chart 4 (bit clamp mode, line clamp mode) t16 t14 t13 t15 t3 t5 t6 t17 t4 tg r cp 1 note note set the ? ? ? ? ? ? ? ? ? ? 1, 2 cross points 1, 2l cross points 1 remark adjust cross points of (
data sheet s14892ej1v0ds00 11 pd3747 definitions of characteristic items 1. saturation voltage : v sat output signal voltage at which the response linearity is lost. 2. saturation exposure : se product of intensity of illumination (lx) and storage time (s) when saturation of output voltage occurs. 3. photo response non-uniformity : prnu the output signal non-uniformity of all the valid pixels when the photosensitive surface is applied with the light of uniform illumination. this is calculated by the following formula. prnu (%) = x = x j : output voltage of valid pixel number j ? ? ? ? ? ? ads average output signal voltage of all the valid pixels at light shielding. this is calculated by the following formula. ads (mv) = d j : dark signal of valid pixel number j 7400
data sheet s14892ej1v0ds00 12 pd3747 5. dark signal non-uniformity : dsnu absolute maximum of the difference between ads and voltage of the highest or lowest output pixel of all the valid pixels at light shielding. this is calculated by the following formula. d j : dark signal of valid pixel number j dsnu (mv): maximum of ? ? ? z o impedance of the output pins viewed from outside. 7. response : r output voltage divided by exposure (lx ? il the rate between the last output voltage and the next one after read out the data of a line. v out tg light v out on off v 1 ri the rate of the difference between the averages of the output voltage of odd and even pixels, against the average output voltage of all the valid pixels. ri (%) = 2 n j = 1 n 2 (v 2j ? 1 ? v 2j ) 1 n j = 1 n v j
data sheet s14892ej1v0ds00 13 pd3747 10. random noise : ? v) 2 shot shot noise is defined as the standard deviation of a valid pixel output signal with 100 times (= 100 lines) data sampling in the light. this includes the random noise. the formula is the same with that of random noise.
data sheet s14892ej1v0ds00 14 pd3747 standard characteristic curves (nominal) 01020304050 0.1 0.25 1 2 0.5 4 8 510 1 0.1 0.2 1 2 1200 600 400 1000 800 0 20 40 60 80 100 spectral response characteristic (t a = + 25 c) dark output temperature characteristic storage time output voltage characteristic (t a = + 25 c) operating ambient temperature t a (
data sheet s14892ej1v0ds00 15 pd3747 application circuit example v out 1 pd3747 ? ? ? ? ? ? ? ? ? remarks 1. it is recommended that pins 5 and 18 ( 2. the inverters shown in the above application circuit example are the 74ac04. +12 v 110 ? ? ? ? b1, b2 equivalent circuit
data sheet s14892ej1v0ds00 16 pd3747 package drawing ccd linear image sensor 22-pin ceramic dip (cerdip) (10.16 mm (400)) name refractive index dimensions 3 2
data sheet s14892ej1v0ds00 17 pd3747 recommended soldering conditions when soldering this product, it is highly recommended to observe the conditions as shown below. if other soldering processes are used, or if the soldering is performed under different conditions, please make sure to consult with our sales offices. for more details, refer to our document ?semiconductor device mounting technology manual? (c10535e) . type of through-hole device pd3747d : ccd linear image sensor 22-pin ceramic dip (cerdip) (10.16 mm (400)) process conditions partial heating method pin temperature : 300
data sheet s14892ej1v0ds00 18 pd3747 [memo]
data sheet s14892ej1v0ds00 19 pd3747 notes for cmos devices 1 precaution against esd for semiconductors note: strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. environmental control must be adequate. when it is dry, humidifier should be used. it is recommended to avoid using insulators that easily build static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work bench and floor should be grounded. the operator should be grounded using wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with semiconductor devices on it. 2 handling of unused input pins for cmos note: no connection for cmos device inputs can be cause of malfunction. if no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using a pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd with a resistor, if it is considered to have a possibility of being an output pin. all handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 status before initialization of mos devices note: power-on does not necessarily define initial status of mos device. production process of mos does not define the initial operation status of the device. immediately after the power source is turned on, the devices with reset function have not yet been initialized. hence, power-on does not guarantee out-pin levels, i/o settings or contents of registers. device is not initialized until the reset signal is received. reset operation must be executed immediately after power-on for devices having reset function.
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